Digital Systems Solved MCQs


Inherited attribute is a natural choice in

Keeping track of variable declaration
Checking for the correct use of L values and R values
Both A and B
None of these
      _____________________________________________________________________________________
YACC builds up

SLR parsing table
Canonical LR parsing table
LALR parsing table
None of the above
      _____________________________________________________________________________________
In an absolute loading scheme which loader function is accomplished by assembler ?

re-allocation
allocation
linking
loading
      _____________________________________________________________________________________
A parser with the valid prefix property is advantageous because it

Detects error as soon as possible
Detects errors as and when they occur
Limits the amount of erroneous output passed to the text phase
All of these
      _____________________________________________________________________________________
The action of parsing the source program into proper syntactic classes is called

Syntax analysis
Lexical analysis
Interpretation analysis
General syntax analysis
      _____________________________________________________________________________________
Relocating bits used by relocating loader are specified by

Relocating loader itself
Linker
Assembler
Macro processor
      _____________________________________________________________________________________
What is the binary equivalent of the decimal number 368

101110000
110110000
111010000
111100000
      _____________________________________________________________________________________
AB+(A+B)’ is equivalent to

A?B
A+B
(A+B)A
(A+B)B
      _____________________________________________________________________________________
A top down parser generates

Right most derivation
Right most derivation in reverse
Left most derivation
Left most derivation in reverse
      _____________________________________________________________________________________
Running time of a program depends on

The way the registers and addressing modes are used
The order in which computations are performed
The usage of machine idioms
All of these
      _____________________________________________________________________________________
Which of the following is the fastest logic

TTL
ECL
CMOS
LSI
      _____________________________________________________________________________________
A bottom up parser generates

Right most derivation
Right most derivation in reverse
Left most derivation
Left most derivation in reverse
      _____________________________________________________________________________________
The digital logic family which has the lowest propagation delay time is

ECL
TTL
CMOS
PMOS
      _____________________________________________________________________________________
Logic X-OR operation of (4ACO)H & (B53F)H results

AACB
0000
FFFF
ABCD
      _____________________________________________________________________________________
12-bit 2’s complement of –73.75 is

01001001.1100
11001001.1100
10110110.0100
10110110.1100
      _____________________________________________________________________________________
A grammar that produces more than one parse tree for some sentence is called

Ambiguous
Unambiguous
Regular
None of these
      _____________________________________________________________________________________
In order to implement a n variable switching function, a MUX must have

2n inputs
2n+1 inputs
2n-1 inputs
2n-1 inputs
      _____________________________________________________________________________________
An optimizer compiler

Is optimized to occupy less space
Is optimized to take less time for execution
Optimizes the code
None of these
      _____________________________________________________________________________________
The absorption law in Boolean algebra say that

X + X = X
X . X = X
x + x . y = x
None of the above
      _____________________________________________________________________________________
Which of the following is the fastest logic?

ECL
TTL
CMOS
LSI
      _____________________________________________________________________________________
The linker

is similar to interpreter
uses source code as its input
is required to create a load module
none of the above
      _____________________________________________________________________________________
A latch is constructed using two cross-coupled

AND and OR gates
AND gates
NAND and NOR gates
NAND gates
      _____________________________________________________________________________________
Pee hole optimization

Loop optimization
Local optimization
Constant folding
Data flow analysis
      _____________________________________________________________________________________
The optimization which avoids test at every iteration is

Loop unrolling
Loop jamming
Constant folding
None of these
      _____________________________________________________________________________________
Scissoring enables

A part of data to be diaplayed
Entire data to be displayed
Full data display on full area of screen
No data to be displayed
      _____________________________________________________________________________________
The 2’s complement of the number 1101101 is

0101110
0111110
0110010
0010011
      _____________________________________________________________________________________
Advantage of panic mode of error recovery is that

It is simple ti implement
It never gets into an infinite loop
Both A and B
None of these
      _____________________________________________________________________________________
Which of the following is not an intermediate code form?

Postfix notation
Syntax trees
Three address codes
Quadruples
      _____________________________________________________________________________________
A multiplexer is a logic circuit that

accepts one input and gives several output
accepts many inputs and gives many output
accepts many inputs and gives one output
accepts one input and gives one output
      _____________________________________________________________________________________
Shift reduce parsers are

Top down parser
Bottom up parser
May be top down or bottom up parser
None of the above
      _____________________________________________________________________________________
A compiler that runs on one machine and produces code for a different machine is called

Cross compilation
One pass compilation
Two pass compilation
None of the above
      _____________________________________________________________________________________
In a positive logic system, logic state 1 corresponds to

Positive voltage
Higher voltage level
Zero voltage level
Lower voltage level
      _____________________________________________________________________________________
Input to code generator

Source code
Intermediate code
Target code
All of the above
      _____________________________________________________________________________________
8-bit 1’s complement form of –77.25 is

01001101.0100
01001101.0010
10110010.1011
10110010.1101
      _____________________________________________________________________________________
The Gray code for decimal number 6 is equivalent to

1100
1001
0101
0110
      _____________________________________________________________________________________
The output of lexical analyzer is

A set of regular expressions
Syntax tree
Set of tokens
Strings of character
      _____________________________________________________________________________________
Local and loop optimization in turn provide motivation for

Data flow analysis
Constant folding
Pee hole optimization
DFA and constant folding
      _____________________________________________________________________________________
Advantage of synchronous sequential circuits over asynchronous ones is

faster operation
ease of avoiding problems due to hazard
lower hardware requirement
better noise immunity
      _____________________________________________________________________________________
The NAND gate output will be low if the two inputs are

00
01
10
11
      _____________________________________________________________________________________
LR stands for

Left to right
Left to right reduction
Right to left
Left to right and right most derivation in reverse
      _____________________________________________________________________________________
In computers, subtraction is generally carried out by

9’s complement
10’s complement
1’s complement
2’s complement
      _____________________________________________________________________________________
Which of the following is the most powerful parser?

SLR
LALR
Canonical LR
Operator precedence
      _____________________________________________________________________________________
Which of the following is used for grouping of characters into tokens (in a computer)

A parser
Code optimizer
Code generator
Scanner
      _____________________________________________________________________________________
_________or scanning is the process where the stream of characters making up the source program is read from left to right and grouped into tokens.

Lexical analysis
Diversion
Modeling
None of the above
      _____________________________________________________________________________________
A binary digit is called a

Bit
Byte
Number
Character
      _____________________________________________________________________________________
Which of the following can be accessed by transfer vector approach of linking?

External data segments
External subroutines
Data located in other procedure
All of these
      _____________________________________________________________________________________
 Macro-processors are ______

Hardware
Compiler
Registers
None of the above
      _____________________________________________________________________________________
A combinational logic circuit which sends data coming from a single source to two or more separate destinations is

Decoder
Encoder
Multiplexer
Demultiplexer
      _____________________________________________________________________________________
Previous Post Next Post